The current trend is to pack more and more electronic circuitry into smaller and smaller spaces. With greater population or packing densities comes higher power densities and the consequent generation of more heat. In addition, many applications subject electronic circuitry to harsh environments of elevated and widely varying temperatures. Thermal management of integrated circuit packaging is thus of paramount importance both to limit semiconductor device junction temperature rise and to avoid mismatches in the thermal expansions of the packaging elements. Excessive junction temperatures imperil semiconductor device reliability and service life. Thermal coefficient of expansion mismatches can cause delamination and cracking in the substrates and printed wiring boards, as well as solder joint failures. The latter consequence is particularly acute in the case of surface mounted, leadless ceramic chip carriers which are now being widely used due to their more efficient space utilization. Thus, successful thermal management involves heat sinking the electronic circuitry to efficiently remove heat and selecting packaging materials of properly matched thermal coefficients of expansion. Unfortunately, the most efficient heat sink materials are high thermal conductivity metals, such as copper and aluminum, which have thermal coefficients of expansions several times greater than that of a typical ceramic chip carrier.
One approach to thermal management of electronic circuitry packaging has been to use low coefficient of thermal expansion (CTE) metals, such as Invar, Kovar, and molybdenum. Typically, these low CTE metals are clad with copper face sheets and incorporated as one or more core layers in packaging substrates. While these low CTE metals can provide effective CTE control, their heat transfer characteristics are not as good as copper and aluminum and they carry a significant weight penalty.
To accommodate both effective CTE control and heat sinking, commonly assigned, Burgess U.S. Pat. No. 4,711,804 discloses a circuit board construction comprising a high thermal conductivity core of aluminum or copper which is apertured at the ceramic chip carrier sites to accept low CTE metal inserts of, for example, Invar.
Another approach to thermal management of integrated circuit packaging is to utilize fiber reinforced resins in substrate cores for CTE control. Because of its extremely low CTE, Dupont's Kevlar aramid is being highly touted as a fiber material. Jensen U.S. Pat. No. 4,318,954 discloses using a graphite filament reinforced epoxy resin in a printed wiring board substrate. Jensen et al U.S. Pat. No. 4,609,586 discloses a printed wiring board laminate comprised of a graphite fiber reinforced matrix of a metal such as aluminum, copper or magnesium for CTE control and heat dissipation.
In certain applications, such as defense electronics and avionics, integrated circuit packaging technology is faced with other extraordinary and varied challenges. Size and weight become crucial considerations. Low CTE metals present weight penalties which may not be acceptable in certain avionics applications. Mechanical strength and stiffness are equally important considerations. Thus, composite material substrates of multiple layers have been used to achieve increased strength and rigidity while avoiding excessive weight. As can be expected, composite substrate structures using specialty materials are expensive from the standpoints of fabrication, processing and materials costs.
It is accordingly an object of the present invention to provide an improved integrated circuit packaging substrate.
An additional object is to provide an integrated circuit packaging substrate of the above character, whose temperature coefficient of expansion is well matched to that of ceramic chip carriers
A further object is to provide an integrated circuit packaging substrate of the above character, which has a high thermal conductivity such as to efficiently convey heat energy away from semiconductor devices supported thereon
Another object is to provide an integrated circuit packaging substrate of the above character, which possesses superior mechanical strength.
An additional object is to provide an integrated circuit packaging substrate of the above character, which is capable of safely and reliably supporting densely populated printed wiring boards in hostile environments.
Yet another object is to provide an integrated packaging substrate of the above character, which is capable of meeting stringent weight and space requirements.
A still further object is to provide an integrated packaging substrate of the above character, which is convenient and inexpensive to manufacture and reliable over a long service life
Other objects of the invention will in part be obvious and in part appear hereinafter